Espressif Systems /ESP32-C6 /TIMG0 /INT_CLR_TIMERS

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Interpret as INT_CLR_TIMERS

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (T0_INT_CLR)T0_INT_CLR 0 (WDT_INT_CLR)WDT_INT_CLR

Description

Interrupt clear bits

Fields

T0_INT_CLR

Set this bit to clear the TIMG_T0_INT interrupt.

WDT_INT_CLR

Set this bit to clear the TIMG_WDT_INT interrupt.

Links

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